1. Field of the Invention
The present invention relates generally to a direct access storage device (DASD) of the type utilizing partial-response signaling and maximum-likelihood (PRML) detection together with digital filtering, and more particularly to a distributed arithmetic implementation of a digital filter in a PRML magnetic recording channel.
2. Description of the Prior Art
Computers often include auxiliary memory storage units having media on which data can be written and from which data can be read for later use. Disk drive units incorporating stacked, commonly rotated rigid magnetic disks are used for storage of data in magnetic form on the disk surfaces. Data is recorded in concentric, radially spaced data information tracks arrayed on the surfaces of the disks. Transducer heads driven in a path toward and away from the drive axis write data to the disks and read data from the disks. Achievement of high data density and high data rates has resulted in the use of a PRML channel for writing and reading digital data on the disks.
To obtain full advantage of the PRML channel, the received signal or the read signal must be passed through a specially designed equalizing filter which produces at its output a signal spectrum corresponding to the wave shape for which the maximum-likelihood detector is designed. When using digital filtering in a PRML system, the filter is located between an analog-to-digital converter (ADC) and other signal processing hardware which controls the system and performs the detection.
Digital filters have been implemented with different filter structures. For example, a distributed arithmetic (DA) implementation of a normal-form of a second-order digital filter is disclosed by U.S. Pat. No. 4,811,262. The disclosed digital filter utilizes a distributed arithmetic table look-up approach including a read only memory containing look-up tables to produce each of the partial products within the filter, which are subsequently summed and recursively used to address the memory.
Digital filters implemented by random access memory (RAM) realize the following advantages over read only storage (ROS) arrangements. Firstly, RAM allows precise tuning at manufacturing; while at best, ROS can give a best fit compromise out of a predetermined set of equalizations which directly affects SER performance. Secondly, RAM allows instant response to magnetic component design changes during development and production; while ROS changes require a new module and associated turnaround times. Thirdly, RAM allows migrateability from product to product.
Known DA digital filters having many taps, such as a ten 10-tap filter would be prohibitively large if implemented in RAM. In a PRML data channel, storing 10 numbers corresponding to the tap weights per equalization and providing hardware for the required additions and subtractions for each RAM value is not practical due to the inherent complexity which would require both significant logic and calculation delay and more importantly, roundoff error becomes very significant. It is desirable to make RAM storage an economically feasible option for a DA digital filter in a PRML data channel.